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Commit 68269179 authored by Sergi Hernandez's avatar Sergi Hernandez
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Modified the ADC module to use the TMemory data structures.

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1 merge request!5Dynamixel manager
This commit is part of merge request !5. Comments created here will be created in the context of that merge request.
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Makefile
+ 1
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View file @ 68269179
......@@ -12,7 +12,7 @@ TARGET_FILES+=src/system_stm32f1xx.c
TARGET_FILES+=src/gpio.c
#TARGET_FILES+=src/darwin_time.c
TARGET_FILES+=src/eeprom.c
#TARGET_FILES+=src/adc_dma.c
TARGET_FILES+=src/adc_dma.c
#TARGET_FILES+=src/imu.c
#TARGET_FILES+=src/darwin_dyn_slave.c
#TARGET_FILES+=src/darwin_dyn_master.c
......
include/adc_dma.h
+ 3
− 4
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......@@ -6,13 +6,15 @@ extern "C" {
#endif
#include "stm32f1xx.h"
#include "adc_dma_registers.h"
#include "memory.h"
#define ADC_NUM_CHANNELS 12
typedef enum {ADC_CH1=0,ADC_CH2=1,ADC_CH3=2,ADC_CH4=3,ADC_CH5=4,ADC_CH6=5,ADC_CH7=6,ADC_CH8=7,
ADC_CH9=8,ADC_CH10=9,ADC_CH12=10} adc_ch_t;
void adc_init(void);
uint8_t adc_init(TMemory *memory);
void adc_start(void);
void adc_set_period(uint8_t period_ms);
inline uint8_t adc_get_period(void);
......@@ -20,9 +22,6 @@ unsigned short adc_get_channel(adc_ch_t channel);
unsigned short adc_get_channel_raw(adc_ch_t channel);
unsigned short adc_get_temperature(void);
void adc_stop(void);
// operation functions
uint8_t adc_in_range(unsigned short int address,unsigned short int length);
void adc_process_write_cmd(unsigned short int address,unsigned short int length,unsigned char *data);
#ifdef __cplusplus
}
......
include/adc_dma_registers.h 0 → 100644
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#ifndef _ADC_DMA_REGISTERS_H
#define _ADC_DMA_REGISTERS_H
#ifndef RAM_ADC_DMA_BASE_ADDRESS
#define RAM_ADC_DMA_BASE_ADDRESS ((unsigned short int)0x0000)
#endif
#define RAM_ADC_DMA_LENGTH 26
#define ADC_CNTRL RAM_ADC_DMA_BASE_ADDRESS// bit 7 | bit 6 | bit 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0
// | | | | | | | Enable
#define ADC_PERIOD (RAM_ADC_DMA_BASE_ADDRESS+1)
#define ADC_CH1_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+2)
#define ADC_CH2_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+4)
#define ADC_CH3_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+6)
#define ADC_CH4_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+8)
#define ADC_CH5_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+10)
#define ADC_CH6_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+12)
#define ADC_CH7_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+14)
#define ADC_CH8_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+16)
#define ADC_CH9_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+18)
#define ADC_CH10_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+20)
#define ADC_TEMP (RAM_ADC_DMA_BASE_ADDRESS+22)
#define ADC_CH12_VOLTAGE (RAM_ADC_DMA_BASE_ADDRESS+24)
#define ADC_START 0x01
#define ADC_STOP 0x02
#define ADC_RUNNING 0x10
#endif
include/darwin_conf.h
+ 3
− 0
View file @ 68269179
......@@ -7,4 +7,7 @@
/* GPIO configuration */
#define RAM_GPIO_BASE_ADDRESS ((unsigned short int)0x0100)
/* ADC configuration */
#define RAM_ADC_DMA_BASE_ADDRESS ((unsigned short int)0x0115)
#endif
include/darwin_registers.h
+ 0
− 33
View file @ 68269179
......@@ -254,33 +254,6 @@ typedef enum {
DARWIN_STAIRS_X_SHIFT_BODY = STAIRS_X_SHIFT_BODY,
//RAM
DARWIN_ADC_CNTRL = 0x0115, // bit 7 | bit 6 | bit 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0
// | | | running | | | start | stop
DARWIN_ADC_PERIOD = 0x0116,
DARWIN_ADC_CH1_L = 0x0117,
DARWIN_ADC_CH1_H = 0x0118,
DARWIN_ADC_CH2_L = 0x0119,
DARWIN_ADC_CH2_H = 0x011A,
DARWIN_ADC_CH3_L = 0x011B,
DARWIN_ADC_CH3_H = 0x011C,
DARWIN_ADC_CH4_L = 0x011D,
DARWIN_ADC_CH4_H = 0x011E,
DARWIN_ADC_CH5_L = 0x011F,
DARWIN_ADC_CH5_H = 0x0120,
DARWIN_ADC_CH6_L = 0x0121,
DARWIN_ADC_CH6_H = 0x0122,
DARWIN_ADC_CH7_L = 0x0123,
DARWIN_ADC_CH7_H = 0x0124,
DARWIN_ADC_CH8_L = 0x0125,
DARWIN_ADC_CH8_H = 0x0126,
DARWIN_ADC_CH9_L = 0x0127,
DARWIN_ADC_CH9_H = 0x0128,
DARWIN_ADC_CH10_L = 0x0129,
DARWIN_ADC_CH10_H = 0x012A,
DARWIN_ADC_TEMP_L = 0x012B,
DARWIN_ADC_TEMP_H = 0x012C,
DARWIN_ADC_CH12_L = 0x012D,
DARWIN_ADC_CH12_H = 0x012E,
DARWIN_IMU_CNTRL = 0x013B, // bit 7 | bit 6 | bit 5 | bit 4 | bit 3 | bit 2 | bit 1 | bit 0
// accel_det | gyro_det | calibrating | running | | start_cal | stop | start
DARWIN_IMU_CAL_SAMPLES_L = 0x013C,
......@@ -613,12 +586,6 @@ typedef enum {
// current phase | climbing | stop stairs | start stairs down | start stairs up
}darwin_registers;
#define ADC_BASE_ADDRESS 0x0115
#define ADC_MEM_LENGTH 30
#define ADC_START 0x01
#define ADC_STOP 0x02
#define ADC_RUNNING 0x10
#define IMU_BASE_ADDRESS 0x013B
#define IMU_MEM_LENGTH 15
#define IMU_START 0x01
......
src/adc_dma.c
+ 58
− 45
View file @ 68269179
......@@ -77,6 +77,9 @@ ADC_HandleTypeDef hadc2;
DMA_HandleTypeDef hdma_adc1;
TIM_HandleTypeDef ADC_TIM_Handle;
/* memory module */
TMemModule adc_mem_module;
uint32_t adc_data[6];// temporal buffer to store ADC data before conversion
uint16_t adc_period_ms;
......@@ -99,6 +102,24 @@ uint16_t adc_convert_voltage(uint16_t value)
return conv_value*(1<<12);
}
void adc_write_cmd(void *module,unsigned short int address,unsigned short int length,unsigned char *data)
{
if(ram_in_range(ADC_CNTRL,address,length))
{
if(data[ADC_CNTRL-address]&ADC_START)
adc_start();
else if(data[ADC_CNTRL-address]&ADC_STOP)
adc_stop();
}
if(ram_in_range(ADC_PERIOD,address,length))
adc_set_period(data[ADC_PERIOD-address]);
}
void adc_read_cmd(void *module,unsigned short int address,unsigned short int length,unsigned char *data)
{
ram_read_table(address,length,data);
}
// interrupt handlers
void ADC_TIMER_IRQHandler(void)
{
......@@ -153,24 +174,24 @@ void ADC_DMA_IRQHandler(void)
if(i==5)
{
value=adc_convert_temperature(adc_data[i]&0x0000FFFF);
ram_data[DARWIN_ADC_TEMP_L]=value%256;
ram_data[DARWIN_ADC_TEMP_H]=value/256;
ram_data[ADC_TEMP]=value%256;
ram_data[ADC_TEMP+1]=value/256;
}
else
{
value=adc_convert_voltage(adc_data[i]&0x0000FFFF);
ram_data[DARWIN_ADC_CH1_L+i*4]=value%256;
ram_data[DARWIN_ADC_CH1_H+i*4]=value/256;
ram_data[ADC_CH1_VOLTAGE+i*4]=value%256;
ram_data[ADC_CH1_VOLTAGE+1+i*4]=value/256;
}
value=adc_convert_voltage((adc_data[i]&0xFFFF0000)>>16);
ram_data[DARWIN_ADC_CH2_L+i*4]=value%256;
ram_data[DARWIN_ADC_CH2_H+i*4]=value/256;
ram_data[ADC_CH2_VOLTAGE+i*4]=value%256;
ram_data[ADC_CH2_VOLTAGE+1+i*4]=value/256;
}
}
}
// public functions
void adc_init(void)
uint8_t adc_init(TMemory *memory)
{
GPIO_InitTypeDef GPIO_InitStruct;
ADC_MultiModeTypeDef multimode;
......@@ -183,7 +204,7 @@ void adc_init(void)
/* initialize the internal variables */
adc_period_ms=360;// equivalent to 10 ms
ram_data[DARWIN_ADC_PERIOD]=10;
ram_data[ADC_PERIOD]=10;
/* enable clocks */
ADC1_CH1_ENABLE_PORT_CLK;
......@@ -353,22 +374,33 @@ void adc_init(void)
HAL_ADC_Start(&hadc2);
HAL_ADCEx_MultiModeStart_DMA(&hadc1,adc_data,6);
/* initialize memory module */
mem_module_init(&adc_mem_module);
adc_mem_module.write_cmd=adc_write_cmd;
adc_mem_module.read_cmd=adc_read_cmd;
if(!mem_module_add_ram_segment(&adc_mem_module,RAM_ADC_DMA_BASE_ADDRESS,RAM_ADC_DMA_LENGTH))
return 0x00;
if(!mem_add_module(memory,&adc_mem_module))
return 0x00;
return 0x01;
}
void adc_start(void)
{
if((ram_data[DARWIN_ADC_CNTRL]&ADC_RUNNING)==0x00)
if((ram_data[ADC_CNTRL]&ADC_RUNNING)==0x00)
{
ram_data[DARWIN_ADC_CNTRL]|=ADC_RUNNING;
ram_data[ADC_CNTRL]|=ADC_RUNNING;
HAL_TIM_OC_Start_IT(&ADC_TIM_Handle, TIM_CHANNEL_1);
}
}
void adc_stop(void)
{
if(ram_data[DARWIN_ADC_CNTRL]&ADC_RUNNING)
if(ram_data[ADC_CNTRL]&ADC_RUNNING)
{
ram_data[DARWIN_ADC_CNTRL]&=(~ADC_RUNNING);
ram_data[ADC_CNTRL]&=(~ADC_RUNNING);
HAL_TIM_OC_Stop_IT(&ADC_TIM_Handle, TIM_CHANNEL_1);
}
}
......@@ -376,12 +408,12 @@ void adc_stop(void)
void adc_set_period(uint8_t period_ms)
{
adc_period_ms=period_ms*36;
ram_data[DARWIN_ADC_PERIOD]=period_ms;
ram_data[ADC_PERIOD]=period_ms;
}
inline uint8_t adc_get_period(void)
{
return ram_data[DARWIN_ADC_PERIOD];
return ram_data[ADC_PERIOD];
}
uint16_t adc_get_channel(adc_ch_t channel)
......@@ -390,27 +422,27 @@ uint16_t adc_get_channel(adc_ch_t channel)
switch(channel)
{
case ADC_CH1: value=ram_data[DARWIN_ADC_CH1_L]+ram_data[DARWIN_ADC_CH1_H]*256;
case ADC_CH1: value=ram_data[ADC_CH1_VOLTAGE]+ram_data[ADC_CH1_VOLTAGE+1]*256;
break;
case ADC_CH2: value=ram_data[DARWIN_ADC_CH2_L]+ram_data[DARWIN_ADC_CH2_H]*256;
case ADC_CH2: value=ram_data[ADC_CH2_VOLTAGE]+ram_data[ADC_CH2_VOLTAGE+1]*256;
break;
case ADC_CH3: value=ram_data[DARWIN_ADC_CH3_L]+ram_data[DARWIN_ADC_CH3_H]*256;
case ADC_CH3: value=ram_data[ADC_CH3_VOLTAGE]+ram_data[ADC_CH3_VOLTAGE+1]*256;
break;
case ADC_CH4: value=ram_data[DARWIN_ADC_CH4_L]+ram_data[DARWIN_ADC_CH4_H]*256;
case ADC_CH4: value=ram_data[ADC_CH4_VOLTAGE]+ram_data[ADC_CH4_VOLTAGE+1]*256;
break;
case ADC_CH5: value=ram_data[DARWIN_ADC_CH5_L]+ram_data[DARWIN_ADC_CH5_H]*256;
case ADC_CH5: value=ram_data[ADC_CH5_VOLTAGE]+ram_data[ADC_CH5_VOLTAGE+1]*256;
break;
case ADC_CH6: value=ram_data[DARWIN_ADC_CH6_L]+ram_data[DARWIN_ADC_CH6_H]*256;
case ADC_CH6: value=ram_data[ADC_CH6_VOLTAGE]+ram_data[ADC_CH6_VOLTAGE+1]*256;
break;
case ADC_CH7: value=ram_data[DARWIN_ADC_CH7_L]+ram_data[DARWIN_ADC_CH7_H]*256;
case ADC_CH7: value=ram_data[ADC_CH7_VOLTAGE]+ram_data[ADC_CH7_VOLTAGE+1]*256;
break;
case ADC_CH8: value=ram_data[DARWIN_ADC_CH8_L]+ram_data[DARWIN_ADC_CH8_H]*256;
case ADC_CH8: value=ram_data[ADC_CH8_VOLTAGE]+ram_data[ADC_CH8_VOLTAGE+1]*256;
break;
case ADC_CH9: value=ram_data[DARWIN_ADC_CH9_L]+ram_data[DARWIN_ADC_CH9_H]*256;
case ADC_CH9: value=ram_data[ADC_CH9_VOLTAGE]+ram_data[ADC_CH9_VOLTAGE+1]*256;
break;
case ADC_CH10: value=ram_data[DARWIN_ADC_CH10_L]+ram_data[DARWIN_ADC_CH10_H]*256;
case ADC_CH10: value=ram_data[ADC_CH10_VOLTAGE]+ram_data[ADC_CH10_VOLTAGE+1]*256;
break;
case ADC_CH12: value=ram_data[DARWIN_ADC_CH12_L]+ram_data[DARWIN_ADC_CH12_H]*256;
case ADC_CH12: value=ram_data[ADC_CH12_VOLTAGE]+ram_data[ADC_CH12_VOLTAGE+1]*256;
break;
default: value=0x0000;
}
......@@ -454,25 +486,6 @@ uint16_t adc_get_channel_raw(adc_ch_t channel)
uint16_t adc_get_temperature(void)
{
return ram_data[DARWIN_ADC_TEMP_L]+ram_data[DARWIN_ADC_TEMP_H]*256;
}
// operation functions
uint8_t adc_in_range(unsigned short int address,unsigned short int length)
{
return ram_in_window(ADC_BASE_ADDRESS,ADC_MEM_LENGTH,address,length);
}
void adc_process_write_cmd(unsigned short int address,unsigned short int length,unsigned char *data)
{
if(ram_in_range(DARWIN_ADC_CNTRL,address,length))
{
if(data[DARWIN_ADC_CNTRL-address]&ADC_START)
adc_start();
else if(data[DARWIN_ADC_CNTRL-address]&ADC_STOP)
adc_stop();
}
if(ram_in_range(DARWIN_ADC_PERIOD,address,length))
adc_set_period(data[DARWIN_ADC_PERIOD-address]);
return ram_data[ADC_TEMP]+ram_data[ADC_TEMP+1]*256;
}
src/cm730_fw.c
+ 1
− 2
View file @ 68269179
#include "stm32f1xx_hal.h"
#include "darwin_conf.h"
#include "darwin_registers.h"
#include "memory.h"
#include "gpio.h"
#include "eeprom.h"
......@@ -31,7 +30,7 @@ int main(void)
/* initialize the GPIO module */
gpio_init(&darwin_memory);
// initialize adc
// adc_init();
adc_init(&darwin_memory);
// initialize imu
// imu_init();
// initialize time module
......
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