diff --git a/f3/include/core/core_cm4.h b/f3/include/core/core_cm4.h
index 308b86813ca7b8cd37610e51d13b735fc6578232..0b9c0c8f550daec2d435e81d095cfa9136b063be 100644
--- a/f3/include/core/core_cm4.h
+++ b/f3/include/core/core_cm4.h
@@ -1912,7 +1912,11 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
+  #ifdef _SIM
+  uint32_t *vectors = (uint32_t *)&SCB->VTOR;
+  #else
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  #endif
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
 }
 
@@ -1927,7 +1931,11 @@ __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
  */
 __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
+  #ifdef _SIM
+  uint32_t *vectors = (uint32_t *)&SCB->VTOR;
+  #else
   uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  #endif
   return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
 }
 
diff --git a/f4/include/core/core_cm4.h b/f4/include/core/core_cm4.h
index d0a4fd1aac9bb91b39808e143bcb83ae366afc75..961db57e90c6640ad80e75509912e45678906082 100644
--- a/f4/include/core/core_cm4.h
+++ b/f4/include/core/core_cm4.h
@@ -1910,10 +1910,10 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
  */
 __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-  #ifndef _SIM
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  #else
+  #ifdef _SIM
   uint32_t *vectors = (uint32_t *)&SCB->VTOR;
+  #else
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
   #endif
   vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
   /* ARM Application Note 321 states that the M4 does not require the architectural barrier */